There has been significant investigation into performance improvements of metal-oxide-semiconductor field effect transistors (MOSFETs). A major challenge, though, has been the scaling of the MOSFET to improve the drive current without degradation of the short channel performance and off-state leakage current. To improve performance, a thin confining semiconductor channel region, for example, SiGe, has attracted attention because of hole confinement in the reduced-band-gap layer which, in turn, leads to PMOSFET short-channel-effects improvement. However, the smaller band gap in the SiGe layer can also confine carriers in the pinch-off region of a pFET, when operated in saturation, leading to reduced drive current.
More specifically, as the SiGe channel layer thickness is reduced with decreased transistor gate length, in order to increase both the operation speed and the number of components per chip, the degradation in saturated drive current is increased due to enhanced confinement of carriers in pinch-off nearby the drain of the FET, thereby limiting performance improvements with gate-length scaling.
Accordingly, the suppression of short channel without sacrificing drive current is a key challenge in sub-100 nm devices.